Description:
The ABB 1MRK002246-BE is a main control / processing board (often referred to as the CPU or GD-type motherboard) used inside ABB’s Relion® series protection and control IEDs — notably the REC670 bay control unit, REG670 line protection relay, and RET670 transformer differential protection relay. It is the computational core of the IED: it executes numerical protection algorithms, manages communication with binary/analog I/O boards via the internal GD-backplane bus, stores application configuration and event records in non-volatile Flash, and provides the interface to the front HMI panel and substation communication networks (IEC 61850, Modbus, etc.). The board incorporates a 32-bit RISC microprocessor, SDRAM, Flash memory, and is fully conformal-coated for substation-grade EMI immunity.
Application Scenarios:
A 400 kV transmission utility experienced a “Watchdog Timeout / CPU Self-Test Fail” alarm on a REG670 line protection IED after a severe lightning-induced switching surge caused a momentary DC-bus disturbance. The relay blocked and could not be cleared via the front panel or PCM600. All I/O boards tested normal when temporarily moved to a spare chassis, confirming the ABB 1MRK002246-BE processing board as the failed element. The protection engineer powered down the IED, swapped in a pre-verified spare 1MRK002246-BE (matching the hardware revision), restored power, and the IED passed all POST routines and reloaded its configuration from the retained application partition. The bay was returned to service in under 45 minutes — avoiding a prolonged outage that would have required placing the line under secondary protection only. The ABB 1MRK002246-BE directly addresses the critical pain point of “relay brain failure” — when this board fails, nothing else in the IED can function, making it one of the highest-priority spares for any utility operating ABB Relion IEDs.
Parameter:
| Main Parameters | Value/Description |
|---|---|
| Product Model | 1MRK002246-BE |
| Manufacturer | ABB (Substation Automation / Power Products Division) |
| Product Category | Main Control / Processing Board (CPU / GD-Type Motherboard) for Relion® IEDs |
| Compatible Equipment | ABB REC670 (Bay Ctrl), REG670 (Line Prot.), RET670 (Transformer Diff.), RED670 (Distance) [verify BOM before order] |
| Processor | 32-bit RISC Microprocessor (100–200 MHz class, version-dependent) |
| RAM | 64 MB – 128 MB SDRAM (typical) |
| Flash Memory | 32 MB – 64 MB (application + boot loader; dual-bank for firmware fallback) |
| Backplane Interface | Proprietary GD-bus to Binary I/O (BDR), Analog I/O (AIO), HMI boards inside IED |
| Communication Ports | Supports IEC 61850 MMS/GOOSE, Modbus TCP/RTU, DNP3 via rear Ethernet/serial interfaces (host IED dependent) |
| Supply Voltage | Derived from IED backplane (typically +5 V / ±12 V DC) |
| Isolation / Coating | Conformal coated (IPC-CC-830B); signal isolation ≥ 1.5 kV on external-linked paths |
| Operating Temp. | -20 °C to +70 °C (inside sealed IED case; some refs cite -40 °C to +70 °C) |
| Mounting | Internal card guides / stand-offs with multi-pin header or edge-connector to IED backplane |
| Dimensions (approx.) | 233 × 166 × 25 mm (form factor varies by IED generation — confirm against removed unit) |
| Weight (approx.) | 0.30 – 0.55 kg |
Technical Principles and Innovative Values:
The ABB 1MRK002246-BE is the deterministic computing heart of the protection IED.
- Innovation Point 1 — Hard-Real-Time Protection Algorithm Execution: The onboard RISC core runs sampled-data protection algorithms (distance, differential, overcurrent evaluation) in fixed, deterministic cycles locked to the A/D sampling clock of the analog input board. This guarantees fault assessment within a bounded time window (typically < 1–2 power-frequency cycles for most elements), a requirement of IEC 60255that generic embedded boards cannot satisfy.
- Innovation Point 2 — Dual-Bank Flash with CRC-Verified Boot: Application firmware and configuration reside in one Flash partition; a separate boot-loader partition allows safe firmware updates and automatic rollback if a CRC check fails on the newly loaded image. This architecture prevents the IED from becoming “bricked” during lifecycle firmware upgrades — a critical safeguard for remotely located substations.
- Innovation Point 3 — Integrated GD-Bus Master with Per-Slot Enumeration: The board acts as bus master on the internal GD-backplane, polling each inserted I/O card (BDRxx, AIOxx, FPxx) at startup, verifying board ID EEPROMs, and mapping I/O points into the protection/data-acquisition memory space. A mismatched or incorrectly seated board will generate a self-test error rather than silent mis-operation, protecting against field-replacement errors.
